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emmc.c (17775B)

      1 #include "emmc.h"
      2 #include "pi.h"
      3 
      4 // Raspberry Pi EMMC driver adapted from Low Level Devel:
      5 // https://github.com/rockytriton/LLD
      6 
      7 static bool wait_reg_mask(reg32 *reg, u32 mask, bool set, u32 timeout) {
      8   for (int cycles = 0; cycles <= timeout * 10; cycles++) {
      9     if ((*reg & mask) ? set : !set) {
     10       return true;
     11     }
     12 
     13     delay_us(100);
     14   }
     15 
     16   return false;
     17 }
     18 
     19 static u32 get_clock_divider(u32 base_clock) {
     20 #define TARGET_RATE SD_CLOCK_HIGH
     21   u32 target_div = 1;
     22 
     23   if (TARGET_RATE <= base_clock) {
     24     target_div = base_clock / TARGET_RATE;
     25 
     26     if (base_clock % TARGET_RATE) {
     27       target_div = 0;
     28     }
     29   }
     30 
     31   int div = -1;
     32   for (int fb = 30; fb >= 0; fb--) {
     33     u32 bt = (1 << fb);
     34 
     35     if (target_div & bt) {
     36       div = fb;
     37       target_div &= ~(bt);
     38 
     39       if (target_div) {
     40         div++;
     41       }
     42 
     43       break;
     44     }
     45   }
     46 
     47   if (div == -1) {
     48     div = 31;
     49   }
     50 
     51   if (div >= 32) {
     52     div = 31;
     53   }
     54 
     55   if (div != 0) {
     56     div = (1 << (div - 1));
     57   }
     58 
     59   if (div >= 0x400) {
     60     div = 0x3FF;
     61   }
     62 
     63   u32 freqSel = div & 0xff;
     64   u32 upper = (div >> 8) & 0x3;
     65   u32 ret = (freqSel << 8) | (upper << 6) | (0 << 5);
     66 
     67   return ret;
     68 }
     69 
     70 /* static bool switch_clock_rate(u32 base_clock, u32 target_rate) { */
     71 /*   u32 divider = get_clock_divider(base_clock, target_rate); */
     72 
     73 /*   while((EMMC->status & (EMMC_STATUS_CMD_INHIBIT | EMMC_STATUS_DAT_INHIBIT))) { */
     74 /*     delay_ms(1); */
     75 /*   } */
     76 
     77 /*   u32 c1 = EMMC->control[1] & ~EMMC_CTRL1_CLK_ENABLE; */
     78 
     79 /*   EMMC->control[1] = c1; */
     80 
     81 /*   delay_ms(3); */
     82 
     83 /*   EMMC->control[1] = (c1 | divider) & ~0xFFE0; */
     84 
     85 /*   delay_ms(3); */
     86 
     87 /*   EMMC->control[1] = c1 | EMMC_CTRL1_CLK_ENABLE; */
     88 
     89 /*   delay_ms(3); */
     90 
     91 /*   return true; */
     92 /* } */
     93 
     94 bool emmc_setup_clock() {
     95   EMMC->control2 = 0;
     96 
     97   /* u32 rate = mailbox_clock_rate(CT_EMMC); */
     98   /* u32 rate = rpi_clock_curhz_get(CLOCK_EMMC); */
     99   u32 rate = 250000000;
    100 
    101   u32 n = EMMC->control[1];
    102   n |= EMMC_CTRL1_CLK_INT_EN;
    103   n |= get_clock_divider(rate);
    104   n &= ~(0xf << 16);
    105   n |= (11 << 16);
    106 
    107   EMMC->control[1] = n;
    108 
    109   if (!wait_reg_mask(&EMMC->control[1], EMMC_CTRL1_CLK_STABLE, true, 2000)) {
    110     /* printk("EMMC_ERR: SD CLOCK NOT STABLE\n"); */
    111     return false;
    112   }
    113 
    114   delay_ms(30);
    115 
    116   //enabling the clock
    117   EMMC->control[1] |= 4;
    118 
    119   delay_ms(30);
    120 
    121   return true;
    122 }
    123 
    124 static emmc_device device = {0};
    125 
    126 static const emmc_cmd INVALID_CMD = RES_CMD;
    127 
    128 static const emmc_cmd commands[] = {
    129   {0, 0, 0, 0, 0, 0, 0,  0, 0, 0, 0, 0, 0, 0},
    130   RES_CMD,
    131   {0, 0, 0, 0, 0, 0, RT136, 0, 1, 0, 0, 0, 2, 0},
    132   {0, 0, 0, 0, 0, 0, RT48,  0, 1, 0, 0, 0, 3, 0},
    133   {0, 0, 0, 0, 0, 0, 0,     0, 0, 0, 0, 0, 4, 0},
    134   {0, 0, 0, 0, 0, 0, RT136, 0, 0, 0, 0, 0, 5, 0},
    135   {0, 0, 0, 0, 0, 0, RT48,  0, 1, 0, 0, 0, 6, 0},
    136   {0, 0, 0, 0, 0, 0, RT48Busy,  0, 1, 0, 0, 0, 7, 0},
    137   {0, 0, 0, 0, 0, 0, RT48,  0, 1, 0, 0, 0, 8, 0},
    138   {0, 0, 0, 0, 0, 0, RT136, 0, 1, 0, 0, 0, 9, 0},
    139   RES_CMD,
    140   RES_CMD,
    141   RES_CMD,
    142   RES_CMD,
    143   RES_CMD,
    144   RES_CMD,
    145   {0, 0, 0, 0, 0, 0, RT48,  0, 1, 0, 0, 0, 16, 0},
    146   {0, 0, 0, 1, 0, 0, RT48,  0, 1, 0, 1, 0, 17, 0},
    147   {0, 1, 1, 1, 1, 0, RT48,  0, 1, 0, 1, 0, 18, 0},
    148   RES_CMD,
    149   RES_CMD,
    150   RES_CMD,
    151   RES_CMD,
    152   RES_CMD,
    153   {0, 0, 0, 0, 0, 0, RT48,  0, 1, 0, 1, 0, 24, 0},
    154   {0, 1, 1, 0, 1, 0, RT48,  0, 1, 0, 1, 0, 25, 0},
    155   RES_CMD,
    156   RES_CMD,
    157   RES_CMD,
    158   RES_CMD,
    159   RES_CMD,
    160   RES_CMD,
    161   RES_CMD,
    162   RES_CMD,
    163   RES_CMD,
    164   RES_CMD,
    165   RES_CMD,
    166   RES_CMD,
    167   RES_CMD,
    168   RES_CMD,
    169   RES_CMD,
    170   {0, 0, 0, 0, 0, 0, RT48,  0, 0, 0, 0, 0, 41, 0},
    171   RES_CMD,
    172   RES_CMD,
    173   RES_CMD,
    174   RES_CMD,
    175   RES_CMD,
    176   RES_CMD,
    177   RES_CMD,
    178   RES_CMD,
    179   RES_CMD,
    180   {0, 0, 0, 1, 0, 0, RT48,  0, 1, 0, 1, 0, 51, 0},
    181   RES_CMD,
    182   RES_CMD,
    183   RES_CMD,
    184   {0, 0, 0, 0, 0, 0, RT48,  0, 1, 0, 0, 0, 55, 0},
    185 };
    186 
    187 static u32 sd_error_mask(sd_error err) {
    188   return 1 << (16 + (u32)err);
    189 }
    190 
    191 static void set_last_error(u32 intr_val) {
    192   device.last_error = intr_val & 0xFFFF0000;
    193   device.last_interrupt = intr_val;
    194 }
    195 
    196 static bool do_data_transfer(emmc_cmd cmd) {
    197   u32 wrIrpt = 0;
    198   bool write = false;
    199 
    200   if (cmd.direction) {
    201     wrIrpt = 1 << 5;
    202   } else {
    203     wrIrpt = 1 << 4;
    204     write = true;
    205   }
    206 
    207   u32 *data = (u32 *)device.buffer;
    208 
    209   for (int block = 0; block < device.transfer_blocks; block++) {
    210     wait_reg_mask(&EMMC->int_flags, wrIrpt | 0x8000, true, 2000);
    211     u32 intr_val = EMMC->int_flags;
    212     EMMC->int_flags = wrIrpt | 0x8000;
    213 
    214     if ((intr_val & (0xffff0000 | wrIrpt)) != wrIrpt) {
    215       set_last_error(intr_val);
    216       return false;
    217     }
    218 
    219 
    220     u32 length = device.block_size;
    221 
    222     if (write) {
    223       for (; length > 0; length -= 4) {
    224         EMMC->data = *data++;
    225       }
    226     } else {
    227       for (; length > 0; length -= 4) {
    228         *data++ = EMMC->data;
    229       }
    230     }
    231   }
    232 
    233   return true;
    234 }
    235 
    236 static bool emmc_issue_command(emmc_cmd cmd, u32 arg, u32 timeout) {
    237   device.last_command_value = TO_REG(&cmd);
    238   reg32 command_reg = device.last_command_value;
    239 
    240   if (device.transfer_blocks > 0xFFFF) {
    241     /* printk("EMMC_ERR: transferBlocks too large: %d\n", device.transfer_blocks); */
    242     return false;
    243   }
    244 
    245   EMMC->block_size_count = device.block_size | (device.transfer_blocks << 16);
    246   EMMC->arg1 = arg;
    247   EMMC->cmd_xfer_mode = command_reg;
    248 
    249   int times = 0;
    250 
    251   while(times < timeout) {
    252     u32 reg = EMMC->int_flags;
    253 
    254     if (reg & 0x8001) {
    255       break;
    256     }
    257 
    258     delay_ms(1);
    259     times++;
    260   }
    261 
    262   if (times >= timeout) {
    263     /* printk("EMMC_WARN: emmc_issue_command timed out\n"); */
    264     device.last_success = false;
    265     return false;
    266   }
    267 
    268   u32 intr_val = EMMC->int_flags;
    269 
    270   EMMC->int_flags = 0xFFFF0001;
    271 
    272   if ((intr_val & 0xFFFF0001) != 1) {
    273 
    274     /* if (EMMC_DEBUG) printk("EMMC_DEBUG: Error waiting for command interrupt complete: %d\n", cmd.index); */
    275 
    276     set_last_error(intr_val);
    277 
    278     /* if (EMMC_DEBUG) printk("EMMC_DEBUG: IRQFLAGS: %x - %x - %x\n", EMMC->int_flags, EMMC->status, intr_val); */
    279 
    280     device.last_success = false;
    281     return false;
    282   }
    283 
    284   switch(cmd.response_type) {
    285     case RT48:
    286     case RT48Busy:
    287       device.last_response[0] = EMMC->response[0];
    288       break;
    289 
    290     case RT136:
    291       device.last_response[0] = EMMC->response[0];
    292       device.last_response[1] = EMMC->response[1];
    293       device.last_response[2] = EMMC->response[2];
    294       device.last_response[3] = EMMC->response[3];
    295       break;
    296   }
    297 
    298   if (cmd.is_data) {
    299     do_data_transfer(cmd);
    300   }
    301 
    302   if (cmd.response_type == RT48Busy || cmd.is_data) {
    303     wait_reg_mask(&EMMC->int_flags, 0x8002, true, 2000);
    304     intr_val = EMMC->int_flags;
    305 
    306     EMMC->int_flags = 0xFFFF0002;
    307 
    308     if ((intr_val & 0xFFFF0002) != 2 && (intr_val & 0xFFFF0002) != 0x100002) {
    309       set_last_error(intr_val);
    310       return false;
    311     }
    312 
    313     EMMC->int_flags = 0xFFFF0002;
    314   }
    315 
    316   device.last_success = true;
    317 
    318   return true;
    319 }
    320 
    321 static bool emmc_command(u32 command, u32 arg, u32 timeout) {
    322   if (command & 0x80000000) {
    323     /* printk("EMMC_ERR: COMMAND ERROR NOT APP\n"); */
    324     return false;
    325   }
    326 
    327   device.last_command = commands[command];
    328 
    329   if (TO_REG(&device.last_command) == TO_REG(&INVALID_CMD)) {
    330     /* printk("EMMC_ERR: INVALID COMMAND!\n"); */
    331     return false;
    332   }
    333 
    334   return emmc_issue_command( device.last_command, arg, timeout);
    335 }
    336 
    337 static bool reset_command() {
    338   EMMC->control[1] |= EMMC_CTRL1_RESET_CMD;
    339 
    340   for (int i=0; i<10000; i++) {
    341     if (!( EMMC->control[1] & EMMC_CTRL1_RESET_CMD)) {
    342       return true;
    343     }
    344 
    345     delay_ms(1);
    346   }
    347 
    348   /* printk("EMMC_ERR: Command line failed to reset properly: %x\n",  EMMC->control[1]); */
    349 
    350   return false;
    351 }
    352 
    353 bool emmc_app_command(u32 command, u32 arg, u32 timeout) {
    354 
    355   if (commands[command].index >= 60) {
    356     /* printk("EMMC_ERR: INVALID APP COMMAND\n"); */
    357     return false;
    358   }
    359 
    360   device.last_command = commands[CTApp];
    361 
    362   u32 rca = 0;
    363 
    364   if (device.rca) {
    365     rca = device.rca << 16;
    366   }
    367 
    368   if (emmc_issue_command( device.last_command, rca, 2000)) {
    369     device.last_command = commands[command];
    370 
    371     return emmc_issue_command( device.last_command, arg, 2000);
    372   }
    373 
    374   return false;
    375 }
    376 
    377 static bool check_v2_card() {
    378   bool v2Card = false;
    379 
    380   if (!emmc_command( CTSendIfCond, 0x1AA, 200)) {
    381     if (device.last_error == 0) {
    382       /* printk("EMMC_ERR: SEND_IF_COND Timeout\n"); */
    383     } else if (device.last_error & (1 << 16)) {
    384       if (!reset_command()) {
    385         return false;
    386       }
    387 
    388       EMMC->int_flags = sd_error_mask(SDECommandTimeout);
    389       /* printk("EMMC_ERR: SEND_IF_COND CMD TIMEOUT\n"); */
    390     } else {
    391       /* printk("EMMC_ERR: Failure sending SEND_IF_COND\n"); */
    392       return false;
    393     }
    394   } else {
    395     if ((device.last_response[0] & 0xFFF) != 0x1AA) {
    396       /* printk("EMMC_ERR: Unusable SD Card: %x\n", device.last_response[0]); */
    397       return false;
    398     }
    399 
    400     v2Card = true;
    401   }
    402 
    403   return v2Card;
    404 }
    405 
    406 static bool check_usable_card() {
    407   if (!emmc_command( CTIOSetOpCond, 0, 1000)) {
    408     if (device.last_error == 0) {
    409       /* printk("EMMC_ERR: CTIOSetOpCond Timeout\n"); */
    410     } else if (device.last_error & (1 << 16)) {
    411       if (!reset_command()) {
    412         return false;
    413       }
    414 
    415       EMMC->int_flags = sd_error_mask(SDECommandTimeout);
    416     } else {
    417       /* printk("EMMC_ERR: SDIO Card not supported\n"); */
    418       return false;
    419     }
    420   }
    421 
    422   return true;
    423 }
    424 
    425 static bool check_sdhc_support(bool v2_card) {
    426   bool card_busy = true;
    427 
    428   while(card_busy) {
    429     u32 v2_flags = 0;
    430 
    431     if (v2_card) {
    432       v2_flags |= (1 << 30); //SDHC Support
    433     }
    434 
    435     if (!emmc_app_command( CTOcrCheck, 0x00FF8000 | v2_flags, 2000)) {
    436       /* printk("EMMC_ERR: APP CMD 41 FAILED 2nd\n"); */
    437       return false;
    438     }
    439 
    440     if (device.last_response[0] >> 31 & 1) {
    441       device.ocr = (device.last_response[0] >> 8 & 0xFFFF);
    442       device.sdhc = ((device.last_response[0] >> 30) & 1) != 0;
    443       card_busy = false;
    444     } else {
    445       /* if (EMMC_DEBUG) printk("EMMC_DEBUG: SLEEPING: %x\n", device.last_response[0]); */
    446       delay_ms(500);
    447     }
    448   }
    449 
    450   return true;
    451 }
    452 
    453 static bool check_ocr() {
    454   bool passed = false;
    455 
    456   for (int i=0; i<5; i++) {
    457     if (!emmc_app_command(CTOcrCheck, 0, 2000)) {
    458       /* printk("EMMC_WARN: APP CMD OCR CHECK TRY %d FAILED\n", i + 1); */
    459       passed = false;
    460     } else {
    461       passed = true;
    462     }
    463 
    464     if (passed) {
    465       break;
    466     }
    467 
    468     return false;
    469   }
    470 
    471   if (!passed) {
    472     /* printk("EMMC_ERR: APP CMD 41 FAILED\n"); */
    473     return false;
    474   }
    475 
    476   device.ocr = (device.last_response[0] >> 8 & 0xFFFF);
    477 
    478   /* if (EMMC_DEBUG) printk("MEMORY OCR: %x\n", device.ocr); */
    479 
    480   return true;
    481 }
    482 
    483 static bool check_rca() {
    484   if (!emmc_command( CTSendCide, 0, 2000)) {
    485     /* printk("EMMC_ERR: Failed to send CID\n"); */
    486 
    487     return false;
    488   }
    489 
    490   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: CARD ID: %x.%x.%x.%x\n", device.last_response[0], device.last_response[1], device.last_response[2], device.last_response[3]); */
    491 
    492   if (!emmc_command( CTSendRelativeAddr, 0, 2000)) {
    493     /* printk("EMMC_ERR: Failed to send Relative Addr\n"); */
    494 
    495     return false;
    496   }
    497 
    498   device.rca = (device.last_response[0] >> 16) & 0xFFFF;
    499 
    500   /*
    501   if (EMMC_DEBUG) {
    502     printk("EMMC_DEBUG: RCA: %x\n", device.rca);
    503 
    504     printk("EMMC_DEBUG: CRC_ERR: %d\n", (device.last_response[0] >> 15) & 1);
    505     printk("EMMC_DEBUG: CMD_ERR: %d\n", (device.last_response[0] >> 14) & 1);
    506     printk("EMMC_DEBUG: GEN_ERR: %d\n", (device.last_response[0] >> 13) & 1);
    507     printk("EMMC_DEBUG: STS_ERR: %d\n", (device.last_response[0] >> 9) & 1);
    508     printk("EMMC_DEBUG: READY  : %d\n", (device.last_response[0] >> 8) & 1);
    509   }
    510   */
    511 
    512   if (!((device.last_response[0] >> 8) & 1)) {
    513     /* printk("EMMC_ERR: Failed to read RCA\n"); */
    514     return false;
    515   }
    516 
    517   return true;
    518 }
    519 
    520 static bool select_card() {
    521   if (!emmc_command( CTSelectCard, device.rca << 16, 2000)) {
    522     /* printk("EMMC_ERR: Failed to select card\n"); */
    523     return false;
    524   }
    525 
    526   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: Selected Card\n"); */
    527 
    528   u32 status = (device.last_response[0] >> 9) & 0xF;
    529 
    530   if (status != 3 && status != 4) {
    531     /* printk("EMMC_ERR: Invalid Status: %d\n", status); */
    532     return false;
    533   }
    534 
    535   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: Status: %d\n", status); */
    536 
    537   return true;
    538 }
    539 
    540 static bool set_scr() {
    541   if (!device.sdhc) {
    542     if (!emmc_command( CTSetBlockLen, 512, 2000)) {
    543       /* printk("EMMC_ERR: Failed to set block len\n"); */
    544       return false;
    545     }
    546   }
    547 
    548   u32 bsc = EMMC->block_size_count;
    549   bsc &= ~0xFFF; //mask off bottom bits
    550   bsc |= 0x200; //set bottom bits to 512
    551   EMMC->block_size_count = bsc;
    552 
    553   device.buffer = &device.scr.scr[0];
    554   device.block_size = 8;
    555   device.transfer_blocks = 1;
    556 
    557   if (!emmc_app_command( CTSendSCR, 0, 30000)) {
    558     /* printk("EMMC_ERR: Failed to send SCR\n"); */
    559     return false;
    560   }
    561 
    562   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: GOT SRC: SCR0: %x SCR1: %x BWID: %x\n", device.scr.scr[0], device.scr.scr[1], device.scr.bus_widths); */
    563 
    564   device.block_size = 512;
    565 
    566   u32 scr0 = BSWAP32(device.scr.scr[0]);
    567   device.scr.version = 0xFFFFFFFF;
    568   u32 spec = (scr0 >> (56 - 32)) & 0xf;
    569   u32 spec3 = (scr0 >> (47 - 32)) & 0x1;
    570   u32 spec4 = (scr0 >> (42 - 32)) & 0x1;
    571 
    572   if (spec == 0) {
    573     device.scr.version = 1;
    574   } else if (spec == 1) {
    575     device.scr.version = 11;
    576   } else if (spec == 2) {
    577 
    578     if (spec3 == 0) {
    579       device.scr.version = 2;
    580     } else if (spec3 == 1) {
    581       if (spec4 == 0) {
    582         device.scr.version = 3;
    583       }
    584       if (spec4 == 1) {
    585         device.scr.version = 4;
    586       }
    587     }
    588   }
    589 
    590   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: SCR Version: %d\n", device.scr.version); */
    591 
    592   return true;
    593 }
    594 
    595 static bool emmc_card_reset() {
    596   EMMC->control[1] = EMMC_CTRL1_RESET_HOST;
    597 
    598   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: Card resetting...\n"); */
    599 
    600   if (!wait_reg_mask(&EMMC->control[1], EMMC_CTRL1_RESET_ALL, false, 2000)) {
    601     /* printk("EMMC_ERR: Card reset timeout!\n"); */
    602     return false;
    603   }
    604 
    605   /* #if (RPI_VERSION == 4) */
    606   /* //This enabled VDD1 bus power for SD card, needed for RPI 4. */
    607   /* u32 c0 = EMMC->control[0]; */
    608   /* c0 |= 0x0F << 8; */
    609   /* EMMC->control[0] = c0; */
    610   /* delay_ms(3); */
    611   /* #endif */
    612 
    613   if (!emmc_setup_clock()) {
    614     return false;
    615   }
    616 
    617   //All interrupts go to interrupt register.
    618   EMMC->int_enable = 0;
    619   EMMC->int_flags = 0xFFFFFFFF;
    620   EMMC->int_mask = 0xFFFFFFFF;
    621 
    622   delay_ms(203);
    623 
    624   device.transfer_blocks = 0;
    625   device.last_command_value = 0;
    626   device.last_success = false;
    627   device.block_size = 0;
    628 
    629   if (!emmc_command(CTGoIdle, 0, 2000)) {
    630     /* printk("EMMC_ERR: NO GO_IDLE RESPONSE\n"); */
    631     return false;
    632   }
    633 
    634   bool v2_card = check_v2_card();
    635 
    636   if (!check_usable_card()) {
    637     return false;
    638   }
    639 
    640   if (!check_ocr()) {
    641     return false;
    642   }
    643 
    644   if (!check_sdhc_support(v2_card)) {
    645     return false;
    646   }
    647 
    648   /* switch_clock_rate(device.base_clock, SD_CLOCK_NORMAL); */
    649 
    650   delay_ms(10);
    651 
    652   if (!check_rca()) {
    653     return false;
    654   }
    655 
    656   if (!select_card()) {
    657     return false;
    658   }
    659 
    660   if (!set_scr()) {
    661     return false;
    662   }
    663 
    664   EMMC->int_flags = 0xFFFFFFFF;
    665 
    666   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: Card reset!\n"); */
    667 
    668   return true;
    669 }
    670 
    671 static bool do_data_command(bool write, u8 *b, u32 bsize, u32 block_no) {
    672   if (!device.sdhc) {
    673     block_no *= 512;
    674   }
    675 
    676   if (bsize < device.block_size) {
    677     /* printk("EMMC_ERR: INVALID BLOCK SIZE: \n", bsize, device.block_size); */
    678     return false;
    679   }
    680 
    681   /* assert(device.block_size == 512); */
    682   /* device.transfer_blocks = bsize / device.block_size; */
    683   device.transfer_blocks = bsize / 512;
    684 
    685   /* if (bsize % device.block_size) { */
    686   if (bsize & 0x1ff) {
    687     /* printk("EMMC_ERR: BAD BLOCK SIZE\n"); */
    688     return false;
    689   }
    690 
    691   device.buffer = b;
    692 
    693   cmd_type command = CTReadBlock;
    694 
    695   if (write && device.transfer_blocks > 1) {
    696     command = CTWriteMultiple;
    697   } else if (write) {
    698     command = CTWriteBlock;
    699   } else if (!write && device.transfer_blocks > 1) {
    700     command = CTReadMultiple;
    701   }
    702 
    703   int retry_count = 0;
    704   int max_retries = 3;
    705 
    706   /* if (EMMC_DEBUG) printk("EMMC_DEBUG: Sending command: %d\n", command); */
    707 
    708   while(retry_count < max_retries) {
    709     if (emmc_command( command, block_no, 5000)) {
    710       break;
    711     }
    712 
    713     if (++retry_count < max_retries) {
    714       /* printk("EMMC_WARN: Retrying data command\n"); */
    715     } else {
    716       /* printk("EMMC_ERR: Giving up data command\n"); */
    717       return false;
    718     }
    719   }
    720 
    721   return true;
    722 }
    723 
    724 int emmc_read(u32 sector, u8 *buffer, u32 size) {
    725   /* assert(size % 512 == 0); */
    726 
    727   /* int r = do_data_command(false, buffer, size, sector); */
    728   /* if (r != size) { */
    729   /*   printk("EMMC_ERR: READ FAILED: %d\n", r); */
    730   /*   return -1; */
    731   /* } */
    732 
    733   bool success = do_data_command(false, buffer, size, sector);
    734   if (!success) {
    735     /* printk("EMMC_ERR: READ FAILED: sector=%d, size=%d\n", sector, size); */
    736     return -1;
    737   }
    738 
    739   return size;
    740 }
    741 
    742 int emmc_write(u32 sector, u8 *buffer, u32 size) {
    743   /* assert(size % 512 == 0); */
    744 
    745   int r = do_data_command(true, buffer, size, sector);
    746   if (!r) {
    747     /* printk("EMMC_ERR: WRITE FAILED: %d\n", r); */
    748     return -1;
    749   }
    750   return size;
    751 }
    752 
    753 bool emmc_init() {
    754   gpio_set_function(34, GPIO_FUNC_INPUT);
    755   gpio_set_function(35, GPIO_FUNC_INPUT);
    756   gpio_set_function(36, GPIO_FUNC_INPUT);
    757   gpio_set_function(37, GPIO_FUNC_INPUT);
    758   gpio_set_function(38, GPIO_FUNC_INPUT);
    759   gpio_set_function(39, GPIO_FUNC_INPUT);
    760 
    761   gpio_set_function(48, GPIO_FUNC_ALT3);
    762   gpio_set_function(49, GPIO_FUNC_ALT3);
    763   gpio_set_function(50, GPIO_FUNC_ALT3);
    764   gpio_set_function(51, GPIO_FUNC_ALT3);
    765   gpio_set_function(52, GPIO_FUNC_ALT3);
    766 
    767   device.transfer_blocks = 0;
    768   device.last_command_value = 0;
    769   device.last_success = false;
    770   device.block_size = 0;
    771   device.sdhc = false;
    772   device.ocr = 0;
    773   device.rca = 0;
    774   device.base_clock = 0;
    775 
    776   bool success = false;
    777   for (int i=0; i<10; i++) {
    778     success = emmc_card_reset();
    779 
    780     if (success) {
    781       break;
    782     }
    783 
    784     delay_ms(100);
    785     /* printk("EMMC_WARN: Failed to reset card, trying again...\n"); */
    786   }
    787 
    788   if (!success) {
    789     return false;
    790   }
    791 
    792   return true;
    793 }