pinned-basic.zig (3734B)
1 const std = @import("std"); 2 const pi = @import("pi"); 3 4 const interrupts = pi.interrupts; 5 const faults = pi.faults; 6 const pinned = pi.pinned; 7 const system = pi.system; 8 const mmu = pi.mmu; 9 const mem = pi.mem; 10 11 const uart = pi.devices.mini_uart; 12 13 inline fn mb(n: usize) usize { 14 return n * 1024 * 1024; 15 } 16 17 const Segments = struct { 18 const Code = mb(0); 19 const Heap = mb(1); 20 const BCM0 = mem.BASE_ADDRESS; 21 const BCM1 = mem.BASE_ADDRESS + mb(1); 22 const BCM2 = mem.BASE_ADDRESS + mb(2); 23 24 const Illegal = mb(2); 25 }; 26 27 fn data_abort_handler(regs: interrupts.Registers) void { 28 _ = regs; 29 30 const far = faults.FAR.get(); 31 32 uart.print("got fault on 0x{X}\n", .{far}); 33 pi.reboot(); 34 } 35 36 pub fn main() !void { 37 // interrupts.set_exception_handler(.DataAbort, data_abort_handler); 38 // uart.print("Set data abort!\n", .{}); 39 40 // const dev: pinned.PinnedAttribute = .{ 41 // .asid = 0, 42 // .domain = 1, 43 // .scope = .Global, 44 // .permission = .UserNoAccess, 45 // .permission_x = .SupervisorRW, 46 // .mem_attributes = .StronglyOrdered, 47 // }; 48 // const kern: pinned.PinnedAttribute = .{ 49 // .asid = 0, 50 // .domain = 1, 51 // .scope = .Global, 52 // .permission = .UserNoAccess, 53 // .permission_x = .SupervisorRW, 54 // .mem_attributes = .OuterInnerNoncacheable, 55 // }; 56 57 // mmu.init(); 58 // uart.print("Initialized MMU!\n", .{}); 59 60 // try pinned.set(0, @bitCast(Segments.Code), @bitCast(Segments.Code), kern); 61 // try pinned.set(1, @bitCast(Segments.Heap), @bitCast(Segments.Heap), kern); 62 // try pinned.set(2, @bitCast(Segments.Stack), @bitCast(Segments.Stack), kern); 63 // try pinned.set(3, @bitCast(Segments.StackInterrupts), @bitCast(Segments.StackInterrupts), kern); 64 // try pinned.set(4, @bitCast(Segments.BCM0), @bitCast(Segments.BCM0), dev); 65 // try pinned.set(5, @bitCast(Segments.BCM1), @bitCast(Segments.BCM1), dev); 66 // try pinned.set(6, @bitCast(Segments.BCM2), @bitCast(Segments.BCM2), dev); 67 68 // uart.print("Setup TLB!\n", .{}); 69 70 // const dacr: mmu.DomainAccessControlRegister = .{ 71 // .d1 = .Client, 72 // }; 73 // dacr.set(); 74 75 // // mmu.set_context(.{ 76 // // .asid = 1, 77 // // .pid = 128, 78 // // }); 79 // var null_ptr: [4096 * 4]u8 align(1 << 14) = .{0} ** (4096 * 4); 80 // mmu.set_context_ttbr0(.{ 81 // .asid = 1, 82 // .pid = 128 << 8, 83 // }, @bitCast(@intFromPtr(&null_ptr))); 84 85 // uart.print("Set context!\n", .{}); 86 87 // pinned.lockdown_print_entries(); 88 89 // for (0..10) |i| { 90 // mmu.enable(); 91 92 // if (mmu.is_enabled()) { 93 // uart.print("MMU ON: hello from virtual memory! count = {}\n", .{i}); 94 // } else { 95 // uart.print("MMU is off?\n", .{}); 96 // } 97 98 // mmu.disable(); 99 100 // if (!mmu.is_enabled()) { 101 // uart.print("MMU is off!\n", .{}); 102 // } else { 103 // uart.print("MMU is on?\n", .{}); 104 // } 105 // } 106 107 // const illegal: *u32 = @ptrFromInt(Segments.Illegal); 108 109 // mem.put_u32(illegal, 0xdeadbeef); 110 111 // uart.print("wrote without vm: got 0x{X}\n", .{mem.get_u32(illegal)}); 112 113 // mmu.enable(); 114 115 // uart.print("mmu.is_enabled() = {any}\n", .{mmu.is_enabled()}); 116 // uart.print("about to write to 0x{X} (illegal)\n", .{Segments.Illegal}); 117 118 // mem.put_u32(illegal, 0xdeadbeef); 119 120 // uart.print("should be unreachable\n", .{}); 121 }