pt-asid.zig (1924B)
1 const std = @import("std"); 2 const pi = @import("pi"); 3 4 const interrupts = pi.interrupts; 5 const faults = pi.faults; 6 const uart = pi.devices.mini_uart; 7 const mem = pi.mem; 8 9 fn data_abort_handler(regs: interrupts.Registers) void { 10 pi.mmu.disable(); 11 const far = faults.FAR.get(); 12 13 uart.print("got fault on 0x{X} from 0x{X}\n", .{ far, regs.pc }); 14 pi.reboot(); 15 } 16 17 fn mb(n: u32) u32 { 18 return n * 1024 * 1024; 19 } 20 21 pub fn main() !void { 22 var buffer: [1024 * 1024]u8 = undefined; 23 var fba: std.heap.FixedBufferAllocator = .init(&buffer); 24 const alloc = fba.allocator(); 25 26 interrupts.set_exception_handler(.DataAbort, data_abort_handler); 27 28 const user_addr: *u32 = @ptrFromInt(mb(16)); 29 const phys_1: *u32 = @ptrFromInt(@intFromPtr(user_addr) + mb(1)); 30 const phys_2: *u32 = @ptrFromInt(@intFromPtr(user_addr) + mb(2)); 31 32 var map_1: pi.procmap.ProcMap = try .init(alloc, 1); 33 var map_2 = try map_1.dupe(); 34 35 try map_1.push(.{ 36 .asid = 1, 37 .n_bytes = mb(1), 38 .type = .ReadWrite, 39 .phys_addr = @intFromPtr(phys_1), 40 .virt_addr = @intFromPtr(user_addr), 41 }); 42 try map_2.push(.{ 43 .asid = 2, 44 .n_bytes = mb(1), 45 .type = .ReadWrite, 46 .phys_addr = @intFromPtr(phys_2), 47 .virt_addr = @intFromPtr(user_addr), 48 }); 49 50 mem.put_u32(phys_1, 0x1111_1111); 51 mem.put_u32(phys_2, 0x2222_2222); 52 53 uart.print("enabling with ASID=1\n", .{}); 54 try map_1.enable(1); 55 uart.print("ASID 1 got 0x{X}\n", .{mem.get_u32(user_addr)}); 56 mem.put_u32(user_addr, 1); 57 try map_1.disable(); 58 uart.print("checking write: 0x{X}\n", .{mem.get_u32(phys_1)}); 59 60 uart.print("enabling with ASID=2\n", .{}); 61 try map_2.enable(2); 62 uart.print("ASID 2 got 0x{X}\n", .{mem.get_u32(user_addr)}); 63 mem.put_u32(user_addr, 2); 64 try map_2.disable(); 65 uart.print("checking write: 0x{X}\n", .{mem.get_u32(phys_2)}); 66 }