commit 0654143545f9d3d258d0adbdee7d70aa1c817bca
parent 1441f5976f96cf2dc1f6e1390fd1b4b0cd4c4565
Author: Sylvia Ivory <git@sivory.net>
Date: Thu, 15 Jan 2026 17:37:19 -0800
Start memory operation rework
Diffstat:
2 files changed, 62 insertions(+), 19 deletions(-)
diff --git a/src/barrier.zig b/src/barrier.zig
@@ -1,19 +0,0 @@
-// https://developer.arm.com/documentation/ddi0333/h/system-control-coprocessor/system-control-processor-registers/c7--cache-operations
-
-released: bool,
-
-pub fn obtain() @This() {
- asm volatile ("MCR p15, 0, r0, c7, c10, 4");
-
- return .{ .released = false };
-}
-
-pub fn release(barrier: *@This()) void {
- if (barrier.released) @panic("attempt to release already released barrier");
- barrier.released = true;
- asm volatile ("MCR p15, 0, r0, c7, c10, 5");
-}
-
-pub fn active(barrier: *@This()) void {
- return !barrier.released;
-}
diff --git a/src/mem.zig b/src/mem.zig
@@ -0,0 +1,62 @@
+// Forces all outstanding explicit memory transactions to complete before executing
+// another **instruction**. Other instructions can execute out of order
+inline fn dsb() void {
+ asm volatile ("mcr p15, 0, %[reg], c7, c10, 5"
+ :
+ : [reg] "r" (0),
+ );
+}
+// Forces all outstanding explicit memory transactions to complete before executing
+// another **memory transaction**. No instruction can execute until this is complete
+inline fn dmb() void {
+ asm volatile ("mcr p15, 0, %[reg], c7, c10, 4"
+ :
+ : [reg] "r" (0),
+ );
+}
+
+const BarrierKind = enum {
+ Strict,
+ Weak,
+};
+
+const Operation = enum {
+ Read,
+ Write,
+ General,
+};
+
+pub inline fn barrier(op: Operation) void {
+ switch (op) {
+ .Write => dmb(),
+ .General | .Read => dsb(),
+ }
+}
+
+pub inline fn put_u32(address: *u32, value: u32) void {
+ asm volatile ("str %[value], [%[address]]"
+ :
+ : [value] "r" (value),
+ [address] "=r" (address),
+ );
+}
+
+pub inline fn put_u32_barrier(
+ address: *u32,
+ value: u32,
+) void {
+ put_u32(address, value);
+ barrier(.Write);
+}
+
+pub inline fn get_u32(address: *u32) u32 {
+ return asm volatile ("str %[result], [%[address]]"
+ : [result] "r" (-> u32),
+ : [address] "=r" (address),
+ );
+}
+
+pub inline fn get_u32_barrier(address: *u32) u32 {
+ barrier(.Read);
+ return get_u32(address);
+}